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DTSTART;TZID=America/Denver:20191117T110000
DTEND;TZID=America/Denver:20191117T111500
UID:submissions.supercomputing.org_SC19_sess110_ws_h2rc111@linklings.com
SUMMARY:Data Flow Pipes: A SYCL Extension for Spatial Architectures
DESCRIPTION:Workshop\n\nData Flow Pipes: A SYCL Extension for Spatial Arch
 itectures\n\nKinsner, Freeman\n\nFIFOs are a common construct in design fo
 r spatial and data flow architectures.   OpenCL 2.0 defined a “pipe” featu
 re to expose the FIFO construct, but the design didn’t meet all needs of s
 patial architectures.  This talk describes a pipes extension to the Khrono
 s SYCL single-source, C++-based programming framework, that exposes a pipe
  abstraction which closes the gaps in the OpenCL design, while also offeri
 ng a more usable interface.  The C++ type system is leveraged to provide s
 tatic connectivity guarantees without extensive compiler implementation ef
 fort, and to provide well-defined interaction with C++ features.  The desc
 ribed extension provides a usable interface that can also act as a substra
 te for additional abstractions to be built on top.  This talk will motivat
 e the utility of FIFOs/pipes in high level language FPGA design, describe 
 the SYCL pipes extension and its mapping to SPIR-V and OpenCL, and provide
  examples of use in common spatial design patterns.\n\nTag: Workshop Reg P
 ass, Accelerators, Compilers, FPGA, Quantum Computing, Reconfigurable Comp
 uting\n\nRegistration Category: Workshop Reg Pass, Accelerators, Compilers
 , FPGA, Quantum Computing, Reconfigurable Computing
URL:https://sc19.supercomputing.org/presentation/?id=ws_h2rc111&sess=sess1
 10
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