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DTSTART;TZID=America/Denver:20191117T091000
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UID:submissions.supercomputing.org_SC19_sess111_pec320@linklings.com
SUMMARY:Keynote: Preparing HPC Education for a Post-Moore Future
DESCRIPTION:Workshop\n\nKeynote: Preparing HPC Education for a Post-Moore 
 Future\n\nSarkar\n\nThough considerable progress has been made on integrat
 ing parallel and distributed computing into Computer Science curricula, ma
 ny challenges still remain especially earlier in the undergraduate curricu
 lum and later in continuing education for computing professionals.  The fi
 rst part of this talk will summarize experiences with HPC education in a s
 ophomore-level course titled "Fundamentals of Parallel Programming" (COMP 
 322) introduced at Rice University in 2011.  The learning outcomes for COM
 P 322 fall into three course modules -- Parallelism, Concurrency, and Dist
 ribution.  We will also present experiences with a Coursera specialization
  that was introduced in 2017 based on COMP 322 material, but adapted into 
 a continuing education format for computing professionals.  This specializ
 ation consists of three courses, derived from the three modules in COMP 32
 2.\n\nIn the second part of the talk, we will summarize future computing t
 rends as we approach the end of Moore's Law, and identify pedagogic concep
 ts that will be relevant for the post-Moore era.  These "extreme heterogen
 eity" disruptions include new kinds of heterogenous processors and acceler
 ators, heterogeneous memories, near/in-memory computation structures, and 
 even non von Neumann computing elements.  In our opinion, selected concept
 s from current pedagogy can provide a valuable starting point for creating
  new pedagogical materials for the post-Moore era.  These concepts include
  task parallelism, data flow execution, and locality/distribution control 
 as first-class primitives, which can enable strong semantic guarantees, as
  well as a promising foundation for post-Moore systems and also modern het
 erogeneous processors including CPUs, GPUs, DSPs, FPGAs, and NMPs.\n\nTag:
  Workshop Reg Pass, Education, HPC, Training\n\nRegistration Category: Wor
 kshop Reg Pass, Education, HPC, Training
URL:https://sc19.supercomputing.org/presentation/?id=pec320&sess=sess111
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