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DTSTART:19700308T020000
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DTSTAMP:20200129T163557Z
LOCATION:603
DTSTART;TZID=America/Denver:20191118T093000
DTEND;TZID=America/Denver:20191118T100000
UID:submissions.supercomputing.org_SC19_sess122_ws_pmbsf105@linklings.com
SUMMARY:An Instruction Roofline Model for GPUs
DESCRIPTION:Workshop\n\nAn Instruction Roofline Model for GPUs\n\nDing, Di
 ng\n\nThe Roofline performance model provides an intuitive approach to ide
 ntify performance bottlenecks and guide performance optimization. However,
  the classic FLOP-centric approach is inappropriate for emerging applicati
 ons that perform more integer operations than floating-point operations. I
 n this paper, we propose an Instruction Roofline Model on NVIDIA GPUs. The
  Instruction Roofline incorporates instructions and memory transactions ac
 ross all memory hierarchies together and provides more performance insight
 s than the FLOP-oriented Roofline Model, i.e., instruction throughput, str
 ide memory access patterns, bank conflicts, and thread predication. We use
  our Instruction Roofline methodology to analyze five proxy applications: 
 HPGMG from AMReX, BatchSW from merAligner, Matrix Transpose benchmarks, cu
 daTensorCoreGemm, and cuBLAS. We demonstrate the ability of our methodolog
 y to understand various aspects of performance and performance bottlenecks
  on NVIDIA GPUs and motivate code optimizations.\n\nTag: Workshop Reg Pass
 , Benchmarks, Performance, Scientific Computing, Simulation\n\nRegistratio
 n Category: Workshop Reg Pass, Benchmarks, Performance, Scientific Computi
 ng, Simulation
URL:https://sc19.supercomputing.org/presentation/?id=ws_pmbsf105&sess=sess
 122
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