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DTSTAMP:20200129T163556Z
LOCATION:503-504
DTSTART;TZID=America/Denver:20191122T103000
DTEND;TZID=America/Denver:20191122T104800
UID:submissions.supercomputing.org_SC19_sess130_ws_ipdrm109@linklings.com
SUMMARY:Design and Evaluation of Shared Memory CommunicationBenchmarks on 
 Emerging Architectures Using MVAPICH2
DESCRIPTION:Workshop\n\nDesign and Evaluation of Shared Memory Communicati
 onBenchmarks on Emerging Architectures Using MVAPICH2\n\nXu, Hashmi, Chakr
 aborty, Subramoni, Panda\n\nRecent advances in processor technologies have
  led to highly multi-threaded and dense multi- and many-core HPC systems. 
 The adoption of such dense multi-core processors is widespread in the Top5
 00 systems. Message Passing Interface (MPI) has been widely used to scale 
 out scientific applications. The communication designs for intra-node comm
 unication in MPI are mainly based on shared memory communication. The incr
 eased core-density of modern processors warrants the use of efficient shar
 ed memory communication designs to achieve optimal performance. While ther
 e have been various algorithms and data-structures proposed for the produc
 er-consumer like scenarios in the literature, there is a need to revisit t
 hem in the context of MPI communication on modern architectures to find th
 e optimal solutions that work best for modern architectures. \n\nIn this p
 aper, we first propose a set of low-level benchmarks to evaluate various d
 ata-structures such as Lamport queues, Fast-Forward queues, and Fastboxes 
 (FB) for shared memory communication. Then, we bring these designs into th
 e MVAPICH2 MPI library and measure their impact on the MPI intra-node comm
 unication for a wide variety of communication patterns. The benchmarking r
 esults are carried out on modern multi-/many-core architectures including 
 Intel Xeon CascadeLake and Intel Knights Landing.\n\nTag: Workshop Reg Pas
 s, Compiler Analysis and Optimization, Middleware, Parallel Programming La
 nguages, Libraries, and Models, Runtime Systems\n\nRegistration Category: 
 Workshop Reg Pass, Compiler Analysis and Optimization, Middleware, Paralle
 l Programming Languages, Libraries, and Models, Runtime Systems
URL:https://sc19.supercomputing.org/presentation/?id=ws_ipdrm109&sess=sess
 130
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