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DTSTART;TZID=America/Denver:20191122T083000
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UID:submissions.supercomputing.org_SC19_sess132_wksp120@linklings.com
SUMMARY:2nd International Workshop on Performance, Portability, and Produc
 tivity in HPC (P3HPC)
DESCRIPTION:Workshop\n\n2nd International Workshop on Performance, Portabi
 lity, and Productivity in HPC (P3HPC)\n\nNeely, Doerfler, Pennycook, Newbu
 rn\n\nThe ability for applications to achieve both portability and high pe
 rformance across computer architectures remains an open challenge.  It is 
 often unrealistic or undesirable for developers to maintain separate imple
 mentations for each target architecture, yet in many cases, achieving high
  performance and fully utilizing an architecture’s underlying features req
 uires the use of specialized language constructs and libraries. Likewise, 
 abstractions and standards that promise portability cannot necessarily del
 iver high performance without additional algorithmic considerations, and p
 erformance compromises are often made to remain portable.  Application dev
 elopers, who strive to work productively while balancing these concerns, o
 ften find the goal to be elusive. \n\nThere is a clear need to develop way
 s of managing the complexity that arises from system diversity that balanc
 e the need for performant specializations with the economy of appropriate 
 and efficient abstractions.  Despite growth in the number of available arc
 hitectures, there are similarities that represent general trends in curren
 t and emerging HPC hardware: increased thread parallelism; wider vector un
 its; specialized hardware units; and deep, complex, memory hierarchies.  T
 his in turn offers some hope for common programming techniques and languag
 e support as community experience matures.\n\nThe purpose of this workshop
  is to provide an opportunity for attendees to share ideas, practical expe
 riences, and methodologies for tackling the challenge of achieving perform
 ance portability and developer productivity across current and future homo
 geneous and heterogeneous computer architectures.\n\nTag: Workshop Reg Pas
 s, Parallel Programming Languages, Libraries, and Models, Performance, Por
 tability, Productivity\n\nRegistration Category: Workshop Reg Pass, Parall
 el Programming Languages, Libraries, and Models, Performance, Portability,
  Productivity
URL:https://sc19.supercomputing.org/presentation/?id=wksp120&sess=sess132
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