Workshop: MCHPC’19: Workshop on Memory Centric High Performance Computing
Event TypeWorkshop
Registration Categories
OS and Runtime Systems
Runtime Systems
TimeMonday, 18 November 20199am - 5:30pm
DescriptionThe growing disparity between CPU speed and memory speed, known as the memory wall problem, has been one of the most critical and long-standing challenges in the computing industry. The situation is further complicated by the recent expansion of the memory hierarchy, which is becoming deeper and more diversified with the adoption of new memory technologies and architectures including 3D-stacked memory, non-volatile random-access memory (NVRAM), memristor, hybrid software and hardware caches, etc. Computer architecture and hardware system, operating systems, storage and file systems, programming stack, performance model and tools are being enhanced, augmented, or even redesigned to address the performance, programmability and energy efficiency challenges of the increasingly complex and heterogeneous memory systems for HPC and data-intensive applications.

The MCHPC workshop aims to bring together computer and computational science researchers, from industry, government labs and academia, concerned with the challenges of efficiently using existing and emerging memory systems.
9:00am - 9:02amOpening -- MCHPC’19: Workshop on Memory Centric High Performance Computing
9:02am - 10:00amMCHPC’19 Keynote Talk: Prospects for Memory
10:00am - 10:30amMCHPC'19 Morning Break
10:30am - 10:46amPerformance Evaluation of the Intel Optane DC Memory With Scientific Benchmarks
10:46am - 11:08amOptimizing Data Layouts for Irregular Applications on a Migratory Thread Architecture
11:08am - 11:30amOptimizing Post-Copy Live Migration with System-Level Checkpoint Using Fabric-Attached Memory
11:30am - 11:52amOptimizing Memory Layout of Hyperplane Ordering for Vector Supercomputer SX-Aurora TSUBASA
11:52am - 12:14pmGeneralized Sparse Matrix-Matrix Multiplication for Vector Engines and Graph Applications
12:14pm - 12:30pmA Distributed Deep Memory Hierarchy System for Content-based Image Retrieval of Big Whole Slide Image Datasets
12:30pm - 2:00pmMCHPC'19 Lunch Break
2:00pm - 2:22pmPerformance Evaluation of Advanced Features in CUDA Unified Memory
2:22pm - 2:41pmExplicit Data Layout Management for Autotuning Exploration on Complex Memory Topologies
2:41pm - 3:00pmMachine Learning Guided Optimal Use of GPU Unified Memory
3:00pm - 3:30pmMCHPC'19 Afternoon Break
3:30pm - 3:53pmUMap: Enabling Application-driven Optimizations for Page Management
3:53pm - 4:15pmExtending OpenMP map Clause to Bridge Storage and Device Memory
4:15pm - 5:30pmMCHPC’19 Panel: Software and Hardware Support for Programming Heterogeneous Memory
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